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The Impact of Vias on PCB Assembly

 The Impact of Vias on PCB Assembly
The continuing trend towards smaller and
smaller devices with even more functionality
has resulted in a dramatic reduction in the size
of components, silicon packages, and the PCBs
themselves. Component technologies such as
BGAs and CSPs have challenged PCB manufacturing
technologies due to the number of input/
output connections and tighter and tighter
pitches associated with these devices. Don’t forget
the costs associated with fabrication.
Via technology—including blind and buried—
has been one of the solutions to address
the miniaturization and component density
challenges in current electronic assemblies. Advantages
include improved electrical and thermal
performance; increased wiring density;
space-saving in PCBs; placement of even more
chips and components in PCBs; and finally,
smaller PCBs.
However, vias are not without their own set
of challenges. In our recent survey that focused
on vias, respondents mentioned challenges
such as impedance matching, routing, placement
of vias, minimum size limitations, aspect
ratio, and the limitations for the PCB manufacturer.
One respondent commented: “In-pad vias
in thermal pads and regular lands often cause
processing issues. If they are tented, trapped residues
and ‘popping’ are issues. If they are not
tented, solder thieving is an issue.
tried using solder mask dams on the pad to prevent
thieving with poor results. We also don’t
want to add more vias than necessary to meet
the thermal target. In this case, more is not necessarily
better as it may increase voiding at the
thermal interface.” He added that more vias increase
the drill time at the PCB fabricator side,
and may increase cost.
Reliability is also an issue, per our survey.
One respondent said that their QA department
is concerned that tenting vias leaves contaminants
in vias, which can affect the long-term reliability
of the PCB assembly. He noted, though,
that tenting vias help minimize solder problems,
so he always tents vias. Apart from tenting,
via filling, mask covering and plating are
also challenges when dealing with vias.
This brings me to our topic for this month’s
issue of SMT Magazine, which aims to provide
more information on the impact of vias in PCB
assembly.
For starters, we have W. Scott Fillebrown of
Libra Industries writing about why vias are considered
the “unsung heroes” of a circuit board.
He said vias designed properly complete a circuit,
while the opposite can cause reliability
nightmares.
Next, David Geiger, Anwar Mohammed and
Jennifer Nguyen of Flex discuss a study they
conducted regarding the impact of via and pad
design on quad flat no-lead (QFN) assembly,
specifically on voiding and protrusion. Their
study finds out whether a small via prevents
the solder to flow to the other side, how the via
should be designed, and what via type will have
less of a voiding issue.
Patrick McGoff of Mentor Graphics meanwhile
looks at the problem of automotive electronics
reliability, and improving automotive
electronics further by looking at the PCB. He
enumerates the critical features of the PCB that
you need to measure to assess reliability, including
the type, size and number of layers of
the PCB, the number and size of vias, microvia
stackup, vias in pad, embedded devices, and aspect
ratio, to name a few. He also lists the electronic
component and padstack details to be
used, and finally, the manufacturing process
considerations when producing the boards.
In his article, Yash Sutariya of Saturn Electronics/
Saturn Flex explains the results of his
study on the impact of waiving PCB pre-baking
prior to assembly. His study includes via integrity,
via life impact, via failure, and overall reliability
failures.
 
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